Spent some time today working on my homework for communication's class. It took longer then expected because I was getting a strange error in my system that I was having difficulty explaining. The simulation in question involved a unipolar pulse train, passed through a band-limited lowpass channel. The problem came from the fact that I used a regular square wave for the input signal and not a PN sequence as I likely should have. For a narrow-enough band, all frequency components were filtered out, and I was left only with a steady state DC value. Needless to say, my simulation always had exactly 50% error, because the received signal was a constant. I spent some time helping one of my classmates with the assignment as well. This is my fifth semester of communications, but this poor girl is having a very rude introduction to it.
I spent some time working on my slides for Portland. They are due by 15 February. They are mostly done, and when I am finished I am going to convert them to a suitable format (PDF or ODP) and post them online. I didn't work on them too much today, but I spent a lot of time last night working on it, and am mostly done with them. I need to practice my presentation once or twice to make sure that all the information is being presented in a logical order, and that I am not omitting anything important. I'm going to sign up to give the presentation here at temple some time, probably in the beginning of march (3-4 weeks). That should make a great trial run of it, so I dont make a fool of myself 3000 miles from home.
Didn't get a lot of work done on my thesis today like I wanted, but I am going to try and get some work knocked out later tonight. Much of my remaining work involves writing some verilog modules to handle tasks that the system generator is not capable of. An ALU is pretty worthless if it can't set any flags. Once I get the verilog modules set up to finish these tasks, I need to go back over some of my older notes and make sure that all my control signals are set up correctly. I still don't have a concrete way to populate the instruction memory yet, but I'm not worried about details like that.
I received an email about the SMART fellowship today. The deadline has passed for applications and application materials, and now the decision process begins. "All submitted applicants will be notified of their award status" by March 31st, so I should know by then that I didn't get it.